Microsequencer for a data processing system using a unique trap

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G06F 922

Patent

active

047424494

ABSTRACT:
A data processing system in which macroinstructions are decoded to provide a sequence of microinstructions comprising one or more microroutines. If a fault condition occurs, the currently executing microinstruction of a sequence thereof is interrupted, while the fault is being handled. When the fault has been resolved, execution of the interrupted microinstruction resumes. If the fault cannot be resolved the sequence of microinstructions is permanently aborted. The process of interrupting the sequence and resuming operation at the interrupted microinstruction is essentially invisible to the microprogram.

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patent: 4096561 (1978-06-01), Trinchieri
patent: 4167779 (1979-09-01), Sullivan et al.
patent: 4205370 (1980-05-01), Hittle
patent: 4251883 (1981-02-01), Grants et al.
patent: 4374418 (1983-02-01), Catiller et al.
patent: 4398244 (1983-08-01), Chu et al.
patent: 4438492 (1984-03-01), Harmon, Jr. et al.
Intel, MCS-80/85 Family User's Manual, 8259 Programmable Interrupt Controller, pp. 6-132 to 6-147, Oct. 1979.

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