Arithmetic logic unit provided with combinational circuit and ze

Details Arithmetic logic unit provided with combinational circuit and ze Arithmetic logic unit provided with combinational circuit and ze

1994-09-20

1996-10-01

Malzahn, David H.

Boots, shoes, and leggings

G06F 700, G06F 750

Patent

active

055616194

ABSTRACT:
An arithmetic logic unit (ALU) is disclosed, which is capable of shortening the zero-detection time. The ALU comprises a combinational circuit, a first and second zero detectors and a selector. The arithmetic device performs a mathematical operation on a first and second binary numbers to produce an operational result. The first zero detector determines whether the operational result of the arithmetic device is zero, based on the first and second binary numbers directly input to the first zero detector, concurrent with mathematical operation being executed by the combinational circuit. The second zero detector determines whether the operation result of the combinational circuit is zero, based on the operational result supplied thereto. The selector selects a detection output of one of the first and second zero detectors, based on a control signal supplied thereto.

REFERENCES:
patent: 3983382 (1976-04-01), Weinberger
patent: 4815019 (1989-03-01), Bosshart
patent: 4947359 (1990-08-01), Vassilliadis et al.
patent: 5020016 (1991-05-01), Nakano et al.
patent: 5367477 (1994-11-01), Hinds et al.

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