Method of manufacture of a two-phase CCD

Fishing – trapping – and vermin destroying

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437 53, 437239, 357 24, H01L 2978

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047420162

ABSTRACT:
The fabrication of a two-phase buried channel silicon CCD involves the use of arsenic diffusion out of selected regions of an overlying oxide layer into selected portions of a buried channel in the underlying silicon intended to serve as the storage region of the first phase set of polysilicon gate electrodes. To eliminate various problems, the oxide layer into which the arsenic is implanted for later outdiffusion is grown in a wet oxidizing ambient, and the arsenic implantation is followed with a restore oxide anneal step involving heating at a moderate temperature before the later outdiffusion by heating at a high temperature. Additionally, an oxide layer intended to serve as the gate oxide underlying a second-phase set of polysilicon gate electrodes is formed by heating the wafer in a dry oxidizing ambient.

REFERENCES:
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patent: 4027382 (1977-06-01), Tasch, Jr. et al.
patent: 4035906 (1977-07-01), Tasch et al.
patent: 4227202 (1980-10-01), Tasch, Jr. et al.
patent: 4228445 (1980-10-01), Tasch, Jr. et al.
patent: 4229752 (1980-10-01), Hynecek

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