Process for fabricating metal-gate CMOS transistor

Details Process for fabricating metal-gate CMOS transistor Process for fabricating metal-gate CMOS transistor

1995-05-09

1996-01-23

Thomas, Tom

Fishing, trapping, and vermin destroying

437 41, 437 57, H01L 218238, H01L 218234

Patent

active

054864828

ABSTRACT:
A process for fabricating metal-gate CMOS transistors on a semiconductor substrate having a well region therein is disclosed herein. The process comprises the steps of: First forming a shielding layer with designated patterns on the substrate and the well region, and, then, forming first field oxides on the substrate or the well region between the designated patterns of the shielding layer through a thermal oxidation procedure. After that, the first field oxides are removed to expose recesses, and drift regions are formed in the substrate and the well region beneath the recesses. Next, second field oxides are formed above the recesses and the shielding layer are subsequently removed. Then, heavily-doped regions are formed in the substrate and the well region between the drift regions, and lightly-doped regions are formed beneath the heavily-doped region, both of which serve as source/drain regions. Finally, a gate oxide layer is formed on the substrate and the well region between the source/drain regions, and an isolation oxide layer is formed on the heavily-doped regions simultaneously, thereby forming a metal gate on the gate oxide layer.

REFERENCES:
patent: 5376568 (1994-12-01), Yang
patent: 5382820 (1995-01-01), Yang et al.
patent: 5424233 (1995-06-01), Yang et al.

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