Multiple comparison circuitry for providing a software error tra

Details Multiple comparison circuitry for providing a software error tra Multiple comparison circuitry for providing a software error tra

1982-04-02

1984-06-05

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307355, 371 16, H03K 524, H03K 1920

Patent

active

044530935

ABSTRACT:
Apparatus and method for performing a logical not function in a multi-compare environment is disclosed. By performing two equivalence compares of a measured variable against selectable target values and using the result of the equivalence compares to selectivity set or reset a bistable element, the need for inverting and multiplexing the output of a comparator that is otherwise required when performing a NOT equivalence function in a single-compare environment is eliminated. The not function logic is used in a system analyzer connected to a data processing system and is used to selectively enable the tracing of software execution as a function of whether or not a variable is a predefined value.

REFERENCES:
patent: 3646516 (1972-02-01), Flinders et al.
patent: 3937938 (1976-02-01), Matthews
patent: 4096989 (1978-06-01), Tawfik
Kellerman and Cesa, "Program Debug Tool for Microprocessors", IBM Tech. Disc. Bull., vol. 20, No. 4, Sep. 1977, p.1358.
Cakaier and Sellier, "Test Device for Microprocessor Programming", IBM Tech. Disc. Bull., vol. 21, No. 10, Mar. 1979, pp. 4076-4077.
Masuda, "Logic Analyzer Aids Efficiency of Digital Devices", J.E.E., vol. 18, No. 178, Oct. 1981, pp. 45-49.

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