Method and apparatus for insulating high voltage semiconductor s

Details Method and apparatus for insulating high voltage semiconductor s Method and apparatus for insulating high voltage semiconductor s

Filed on

1987-01-20

Date issued

1988-12-06

Examiner

Edlow, Martin H.

Other Related Categories

357 238, 357 2311, 357 50, 357 52, 357 54, H01L 2978, H01L 2704, H01L 2940

Type

Patent

Status

active

Patent number

047898860

Description

ABSTRACT:
A high voltage semiconductor includes an electrically floating conductive layer located adjacent the field oxide in the gap region between a junction pair. The electrically floating conductive layer allows free charge in the insulating layers to be dissipated. As a result, the depletion region in the substrate is extended and the breakdown voltage of the device is improved considerably.

REFERENCES:
patent: 4224636 (1980-09-01), Yonezawa et al.
patent: 4271582 (1981-06-01), Suirai et al.
patent: 4412242 (1983-10-01), Herman et al.
J. Vac. Sci. Technol., vol. 17, No. 4, Jul./Aug. 1980, S. P. Murarka, "Refractory Silicides . . . ", pp. 776-792.
"Surface Breakdown in Silicon Planar Diodes Equipped with Field Plate", by F. Conti and M. Conti, Solid-State Electronics, 1972, vol. 15, pp. 93-105.
"Design Considerations for High-Voltage Overlay Annular Diodes", by Demir S. Zoroglu and Lowell E. Clark, IEEE Transactions on Electron Devices, vol. ED-19, No. 1, Jan. 1972.
"Enhancement of Breakdown Properties of Overlay Annular Diodes by Field Shaping Resistive Films", by L. E. Clark and D. S. Zoroglu, Solid-State Electronics, 1972, vol. 15, pp. 653-657.
"Motorola Semiconductor Technical Data", Specification Sheets, Motorola, Inc., 1985, 4 pages.
Page 597 of article in IEEE Journal of Solid-State Circuits, vol. SC-21, No. 4, Aug. 1986, referring to U.S. Pat. No. 4,553,041, issued Nov. 12, 1985.

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