Patent
1979-11-26
1981-10-20
Edlow, Martin H.
357 23, 357 91, H01L 2906
Patent
active
042964296
ABSTRACT:
A vertical insulated gate field effect transistor having a first conductivity layer, a second conductivity layer thereon, a third first conductivity layer thereon, a groove extending from the surface of the third layer through the second layer into the first layer, a layer of insulation and gate material in the groove and a shallow first conductivity vertical region extending from the third layer into the second layer along the groove to form a short channel in the second layer with a shallow device junction.
The device is fabricated by masking the three semiconductor layers and etching the third layer and part of the second layer to form a groove, diffusing second conductivity impurities to a shallow depth in the groove, continuing the etching to extend the groove through the second layer into the first layer. A layer of insulation and gate material are formed in the groove to produce the vertical channel.
REFERENCES:
patent: 3975221 (1976-08-01), Rodgers
patent: 4003036 (1977-01-01), Jenne
patent: 4003126 (1977-01-01), Holmes
patent: 4065783 (1977-12-01), Ouyang
patent: 4084175 (1978-04-01), Ouyang
patent: 4105475 (1978-08-01), Jenne
patent: 4116720 (1978-09-01), Vinson
patent: 4156289 (1979-03-01), Hoffmann
patent: 4173765 (1979-11-01), Heald
patent: 4222063 (1980-09-01), Rodgers
Edlow Martin H.
Harris Corporation
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