Stack control system and method for data processor

Details Stack control system and method for data processor Stack control system and method for data processor

1978-11-27

1981-05-19

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1306

Patent

active

042689031

ABSTRACT:
A data processor having a stack area with a desirable variable size formed on a desirable area of a main memory unit in accordance with a direction by a user program, is provided with a stack control register group for controlling the stack area. A stack upper address register in the stack control register group holds the upper address specified on the stack area. The stack lower address register holds the lower limit address specified. A control stack pointer register holds the start address of a control stack area formed on the stack area for storing the number of a register specified by a user program and the contents thereof. A data stack pointer register holds the start address of the data stack area which is formed on said stack area and used by the user program.

REFERENCES:
patent: 3868644 (1975-02-01), Healey et al.
patent: 3938098 (1976-02-01), Garlic
patent: 4041462 (1977-08-01), Davis et al.
patent: 4104721 (1978-08-01), Markstein et al.
"Programming Techniques", P.D.P.-11/40, Processor Handbook, Digital Equipment Corp., 1972, Chapter 5, pp. 5-1 to 5-5.

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