Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1998-02-23
2000-07-04
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257347, H01L 2976, H01L 31036, H01L 31112
Patent
active
060842482
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a thin film transistor, a manufacturing method a thin film transistor, and a circuit and a liquid crystal display device each incorporating the thin film transistor.
DESCRIPTION OF RELATED ART
A polycrystalline silicon thin film transistor which can be formed at low processing temperature, i.e., "low temperature processed polysilicon TFT", attracts attention as an element which enables the formation of a high-definition liquid crystal display comprising a large glass substrate containing a driver.
FIG. 38A and FIG. 38B, which is a sectional view taken along line B--B of FIG. 38A, show, as an example of conventional polysilicon TFT, a top gate type TFT in which a polysilicon thin film which forms source and drain regions is positioned on the lower side, and a gate electrode is positioned on the upper side. This polysilicon TFT is an example of an N-channel TFT.
As shown in FIGS. 38A and 38B, a buffer layer 2 comprising a silicon oxide film is formed on a glass substrate 1, and a polysilicon thin film 3 is formed on the buffer layer 2. Further, a gate insulation film 4 comprising a silicon oxide film is formed to cover the polysilicon thin film 3, and a gate electrode 5 comprising a tantalum nitride film, an aluminum (Al) film or the like is formed. Further, a source region 6 and a drain region 7 into which an N-type impurity is introduced are formed in portions of the polysilicon thin film 3 except at a portion directly below the gate electrode. Also, a layer insulation film 8 comprising a silicon oxide film is formed, contact holes 9 are formed, and a source electrode 10 and a drain electrode 11 are formed.
In the field of general semiconductor devices, in order to achieve a high-speed device, low power consumption, and higher function, miniaturization of devices and utilization of a SOI (Silicon On Insulator) structure have recently attracted attention. In the SOI structure, for example, single crystal silicon layers are formed to hold a silicon oxide film therebetween on the surface of a silicon substrate. However, while the SOI structure has the above advantages, it also is influenced by a substrate floating effect because the transistor formation region and the support substrate are electrically isolated. In this case, the problem caused by the substrate floating effect is, for example, deterioration in voltage resistance between the source and drain. This occurs because the holes generated in a high electric field region near the drain region accumulate in a portion below the channel to increase the potential of the channel portion, and thus a parasitic bipolar transistor comprising source, channel and drain regions which serve as an emitter, a base and a collector, respectively, is turned on.
On the other hand, when a polysilicon TFT constructed as shown in FIG. 38A and 38B is used as a liquid crystal driving element, a signal voltage is applied between the source electrode 10 and the drain electrode 11, and a scanning voltage is applied to the gate electrode 5. However, in this case, the same deterioration in characteristics which occur in the SOI structure due to the substrate floating effect also occur.
Also, significant deterioration in TFT has been apparent. Since the channel region of TFT is surrounded by an insulation film, a structure is formed in which heat hardly escapes. Therefore, deterioration occurs due to the heat of the TFT itself which is generated during operation. Such deterioration significantly occurs in a TFT having a large channel width.
A polycrystalline silicon TFT exhibits a large leakage current (off current) during an off time and large variations in the amount of current, as compared with a single crystal silicon transistor. This tendency is more significant in low-temperature processed TFTs than TFTs formed by a high temperature process.
For example, as the leakage current (off current) of the TFT of a pixel portion increases, the luminance of a display screen largely varies, and TFT design becomes difficult due
REFERENCES:
patent: 4514253 (1985-04-01), Minezaki
patent: 5616935 (1997-04-01), Koyama et al.
patent: 5739574 (1998-04-01), Nakamura
patent: 5847422 (1998-12-01), Chi et al.
Ngo Ngan V.
Seiko Epson Corporation
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