Static information storage and retrieval – Addressing
Patent
1983-08-02
1985-12-24
Fears, Terrell W.
Static information storage and retrieval
Addressing
365189, G11C 1140
Patent
active
045610711
ABSTRACT:
This storage system is designed to refer to a translation lookaside buffer, a buffer address array and a buffer storage in parallel. The translation lookaside buffer translates a logical address requesting memory access into a real address. The buffer storage retains part of the data retained in blocks by main storage and outputs data from M blocks in accordance with the logical address to M aligners. The buffer address array retains the addresses in MS of the data stored in each of the blocks in the buffer storage, and outputs M addresses in accordance with the logical address. A comparator compares the real addresses from the translation lookaside buffer with the addresses from the buffer address array, selects one of the outputs from the aligners, and transfers that output to a processor.
REFERENCES:
patent: 4419746 (1983-12-01), Hunter et al.
Hashimoto Noriaki
Izumi Chikahiko
Kubo Kanji
Fears Terrell W.
Hitachi , Ltd.
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