Pulse enhancement circuit for digital integrated circuit

Details Pulse enhancement circuit for digital integrated circuit Pulse enhancement circuit for digital integrated circuit

1982-02-08

1985-01-15

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307269, 307449, 307482, H03K 501, H03K 502, H03K 5135

Patent

active

044940157

ABSTRACT:
Integrated digital MOS-semiconductor circuit, including a first circuit part for generating charging and switching pulses, a second circuit part having an input connected to the first circuit part for being addressed by the pulses supplied by the first circuit part, first, second and third self-locking MOS-field effect transistors each having a source, a drain and a gate electrode, first and second capacitors having first and second terminals, the first terminal of the first capacitor being connected through the first transistor to the input of the second circuit part, the first terminal of the second capacitor being connected through the second transistor to the input of the second circuit part, a first supply potential source at reference potential, a second supply potential source different from reference potential being connected to at least one terminal of the third transistor and through the third transistor to the first terminal of the second capacitor, the second supply potential source also being connected to the gate electrode of the first transistor, the gate of the second transistor being connected between the first transistor and the first terminal of the first capacitor, means for supplying a first digital pulse having a given beginning and end to the second terminal of the first capacitor, and means for supplying a second digital pulse having a given beginning and end to the second terminal of the second capacitor, the first and second digital pulse simultaneously ending with the pulse supplied by the first circuit part, the beginning of the pulse supplied by the first circuit part occurring earlier than the beginning of the first and second digital pulses, and the beginning of the second digital pulse occurring at least as late as the beginning of the first digital pulse.

REFERENCES:
patent: 4330719 (1982-05-01), Nagami
patent: 4382194 (1983-05-01), Nakano et al.
patent: 4398100 (1983-08-01), Tobita et al.

Affiliated with

Also associated with

Rating

Pulse enhancement circuit for digital integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pulse enhancement circuit for digital integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pulse enhancement circuit for digital integrated circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1482352