Gate turn-off thyristor with selective anode penetrating shorts

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357 20, 357 86, 357 89, H01L 2974

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active

044504675

ABSTRACT:
A gate turn-off thyristor of a short-circuited emitter configuration comprises a semiconductor substrate of a P.sub.E -N.sub.B -P.sub.B -N.sub.E four-layer structure, wherein a P.sub.E -layer is short-circuited through a N.sub.B -layer and an anode. The N.sub.B -layer includes heavily doped regions to which the anode is ohmic contacted with a low resistance. The P.sub.E -layer is provided at a location at least covered by a projection of the N.sub.E -layer. The thickness of the heavily doped regions is greater than that of the P.sub.E -layer. The improved structure assures satisfactory gate turn-off characteristics, although the semiconductor substrate is not doped with a life time killer impurity.

REFERENCES:
patent: 3239728 (1966-03-01), Aldrich et al.
patent: 3914782 (1975-10-01), Nakata
patent: 4007475 (1977-02-01), Collumeau
patent: 4356503 (1982-10-01), Shafer et al.
H. Oka et al., "Electr. Char. of H-V, H-PWR Fast-SW, Rev-Cond. Thyristor and Appl. for Chopper Use," IEEE Trans. on Ind. Appl., vol. IA-9, #2, Mar.-Apr., 1973, pp. 236-247.

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