1991-01-18
1992-03-17
Prenty, Mark
357 68, H01L 2972, H01L 2348
Patent
active
050973096
ABSTRACT:
A vertical PNP transistor for use in an integrated circuit is disclosed. A P-type substrate serves as collector. An N-type epitaxial layer is formed on the substrate and serves as base. A P-type region is formed in the epitaxial layer and serves as emitter. An N.sup.+ -type localized buried layer is formed on the substrate in the area beneath the emitter. The localized buried layer covers less than all of the area under the emitter. An N.sup.+ -type sinker region is formed through the epitaxial layer, connecting to the localized buried layer and serving as a connection to the base of the vertical PNP transistor.
REFERENCES:
patent: 4151540 (1979-04-01), Sander et al.
patent: 4949150 (1990-08-01), Giannella
Exar Corporation
Prenty Mark
LandOfFree
Vertical PNP transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical PNP transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical PNP transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1479956