Apparatus and method for measuring gate delays in integrated cir

Details Apparatus and method for measuring gate delays in integrated cir Apparatus and method for measuring gate delays in integrated cir

1990-12-05

1992-03-17

Wieder, Kenneth A.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 731, 324 83D, 324617, G01R 2500

Patent

active

050972081

ABSTRACT:
Apparatus and a method for measuring average individual gate delays on integrated circuit wafers without the need for high bandwidth is provided. A chain of gates is provided on the wafer. A reference signal is propagated through the chain to produce a delayed signal. The delayed signal is logically combined with the reference signal to provide a periodic train of pulses whose period is proportional to that of the reference signal. The pulse widths represent the total gate delay of the chain, and are determined by statistically sampling the pulse train to determine its duty cycle. The apparatus and method are compatible with automated testing equipment and methods which can be synchronized with the reference signal.

REFERENCES:
patent: 2851596 (1958-09-01), Hilton
patent: 3681693 (1972-08-01), Hseh
patent: 4712061 (1987-12-01), Lach
patent: 4782283 (1988-11-01), Zasio

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