Modulo decoder

Pulse or digital communications – Repeaters – Testing

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371 43, H03D 100, H04L 2706

Patent

active

053848101

ABSTRACT:
A high-speed convolutional decoder is constructed by performing the transition, or branch, metric calculations in reference to a subset of a constellation, which comprises a plurality of subsets. In addition, any subset can be chosen as the reference subset through the use of "modulo decoding." In a modulo decoder, the constellation space is folded into a modulo set area that is centered around the arbitrarily chosen reference subset. The branch, or transition, metrics are calculated within the modulo set area. As a result, the branch metric computations are only performed on a small area of the signal space, with the result that only one error is extracted, the branch metrics are easily computed, and one slicing is performed--thus reducing overall computation time.

REFERENCES:
patent: 3925611 (1975-12-01), Dennis
patent: 4709377 (1987-11-01), Martinez et al.
patent: 4959842 (1990-09-01), Forney, Jr.
"Combined Trellis Coding and DFE through Tomlinson Precoding", Ahmad K. Aman, Robert L. Cupo, and Nikolaos A. Zervos, IEEE Journal on Selected Areas in Communications, vol. 9, No. 6, Aug 1991.
"The Viterbi Algorithm", G. David Forney, Jr., Proceedings of the IEEE, vol. 61, No. 3, Mar. 1973.

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