Vertically integrated semiconductor package for an implantable m

Details Vertically integrated semiconductor package for an implantable m Vertically integrated semiconductor package for an implantable m

1997-02-27

2000-01-11

Kamm, William E.

Surgery: light, thermal, and electrical application

Light, thermal, and electrical application

Electrical therapeutic systems

A61N 1372

Patent

active

060145862

ABSTRACT:
An electronic package having vertically integrated components placed upon a substrate surface is configured to increase packing density of the components. Integrated circuits which are vertically-stacked and attached to the substrate surface communicate with surrounding components through connection to bond pads on the substrate surface. The bond pads can be placed entirely about a perimeter of the integrated circuits to achieve optimal packing density. Individual bond pads may be shared by two or more integrated circuits by connection therewith. In an alternative embodiment, a separate integrated circuit is attached to the substrate adjacent to the stacked integrated circuits with a row of shared bond pads positioned therebetween. Individual passive or active components may be placed between bond pads for incorporation into the circuit structure.

REFERENCES:
patent: 3262023 (1966-07-01), Boyle
patent: 4467400 (1984-08-01), Stopper
patent: 4567643 (1986-02-01), Droguet et al.
patent: 4614194 (1986-09-01), Jones et al.
patent: 4616655 (1986-10-01), Weinberg et al.
patent: 4763188 (1988-08-01), Johnson
patent: 4959749 (1990-09-01), Dzarnoski et al.
patent: 5012323 (1991-04-01), Fernworth
patent: 5028986 (1991-07-01), Sugano et al.
patent: 5060027 (1991-10-01), Hart et al.
patent: 5140496 (1992-08-01), Heinks et al.
patent: 5208782 (1993-05-01), Sakutz et al.
patent: 5291061 (1994-03-01), Ball
patent: 5309020 (1994-05-01), Muresawa et al.
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5330504 (1994-07-01), Somerville et al.
patent: 5422435 (1995-06-01), Takier et al.
patent: 5439482 (1995-08-01), Adams et al.
patent: 5470345 (1995-11-01), Hassler et al.
patent: 5473198 (1995-12-01), Hajiyz et al.
Tuckerman, D.B., et al., "Laminated Memory: A New 3-Dimensional Packaging Technology for MCMs," IEEE, pp. 58-63, (Jul. 1994).
"8 Megabit High Speed CMOS SRAM (DPS512X16MKn3), " Dense-Pac Microsystems, pp. 1-8, Revision D, (No date).

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