Reservation station including addressable constant store for a f

Details Reservation station including addressable constant store for a f Reservation station including addressable constant store for a f

1997-05-13

1998-06-02

Malzahn, David H.

Boots, shoes, and leggings

36473601, 395563, G06F 9302

Patent

active

057611050

ABSTRACT:
A reservation station with an addressable constant store enables the provision of floating point constants to arithmetic units in a floating point unit of a superscalar processor. Floating point constant identifiers supplied with floating point instructions index into the addressable store and addressed constant are provided in an internal, extended-precision format which provides extra precision and/or range when compared with formats available external to the floating point unit. In this way, full internal, extended-precision constants can be provided for use in microcoded floating point instruction sequences. Additionally, internal extended-precision floating point constants may be rounded in accordance with a prevailing rounding mode and format to provide external format floating point constant values for use in implementing load constant instructions.

REFERENCES:
patent: 3930232 (1975-12-01), Wallach et al.
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4631696 (1986-12-01), Sakamoto
patent: 4789956 (1988-12-01), Hildebrandt
patent: 4928223 (1990-05-01), Dao et al.
patent: 4941120 (1990-07-01), Brown et al.
patent: 5053631 (1991-10-01), Perlman et al.
patent: 5058048 (1991-10-01), Gupta et al.
patent: 5095458 (1992-03-01), Lynch et al.
patent: 5128888 (1992-07-01), Tamura et al.
patent: 5128891 (1992-07-01), Lynch et al.
patent: 5155816 (1992-10-01), Kohn
patent: 5155820 (1992-10-01), Gibson
patent: 5206828 (1993-04-01), Shah et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5257215 (1993-10-01), Poon
patent: 5262973 (1993-11-01), Richardson
patent: 5317526 (1994-05-01), Urano et al.
patent: 5339266 (1994-08-01), Hinds et al.
patent: 5440902 (1995-08-01), Brewer et al.
patent: 5481686 (1996-01-01), Dockzer
patent: 5499352 (1996-03-01), Cliff et al.
patent: 5568624 (1996-10-01), Sites et al.
patent: 5574928 (1996-11-01), White et al.
patent: 5632023 (1997-05-01), White et al.
patent: 5651125 (1997-07-01), Witt et al.
Vojin G. Oklobdzjia, "An Algorithmic and Novel Design of a Leading Zone Detector Circuit: Comparison with Logic Synthesis", .COPYRGT.1995, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 124-128.
Kai Hwang, et al., "Computer Architecture and Parallel Processing", .COPYRGT.1984, pp. 170-174.
Intel; 486.TM. Microprocessor Family Programmer's Reference Manual .COPYRGT.1992, Chapter 15, pp. 15-1 to 15.2, Chapter 16, pp. 16-1 to 16-28.
R.M. Tomasulo, "An Efficient Algorithm for Exploiting Multiple Arithmetic Units", V32 IBM Journal of R&D, Jan. 1967, vol. 11, pp. 25-33.
IEEE, "IEEE Standard for Radix-Independent Floating-Point Arithmetic", Copyright 1987, pp. 7-16.
IEEE, "IEEE Standard for Binary Floating-Point Arithmetic", Copyright 1985, pp. 7-17.
R.M. Tomsaulo, "An Efficient Algorithm for Exploiting Multiple Arithmetic Units", Jan. 1967, pp. 293-305.
Mike Johnson, "Superscalar Microprocessor Design," (Prentice Hall series in innovative technology), 1991 (copy on reserve in the EIC library).

Affiliated with

Also associated with

Rating

Reservation station including addressable constant store for a f does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reservation station including addressable constant store for a f, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reservation station including addressable constant store for a f will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1468517