Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-11-25
2000-01-11
Mai, Son
Static information storage and retrieval
Addressing
Sync/clocking
365191, G11C 700
Patent
active
060143401
ABSTRACT:
In a synchronous semiconductor memory device in which contents of an internal operation is designated by commands applied in synchronization with a clock signal, operations of decoding read, write and precharge commands different from an active command for activating the internal operation are enabled only when the active command is active. Even if a command such as read command other than the active command is applied during an inactive state of internal circuits, other command decoder cannot perform the decoding, so that unnecessary circuit operation can be prevented.
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patent: 5311483 (1994-05-01), Takasugi
patent: 5448528 (1995-09-01), Nagai
patent: 5530677 (1996-06-01), Grover
patent: 5559752 (1996-09-01), Stephens, Jr. et al.
patent: 5774402 (1998-06-01), Lee
Mai Son
Mitsubishi Denki & Kabushiki Kaisha
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