Output timer

Details Output timer Output timer

1997-12-15

1999-11-09

Wells, Kenneth B.

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Measuring or testing

327151, G01D 300

Patent

active

059828420

ABSTRACT:
An output timer includes a capture register for capturing a count value held by a free running up-counter in coorporation with a transmission gate in response to an event signal applied to the output timer. An adder adds a first value stored in another register to the count value captured by the capture register and produces a sum. A comparator compares a count value held by the free running up-counter with the sum and outputs a coincidence signal when the count value and sum are equal to each other. A set-reset flip-flop includes a set terminal for receiving the event signal and a reset terminal connected to the output terminal of the comparator.

REFERENCES:
patent: 5365183 (1994-11-01), Mitsuhira

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