Double silicon-on-insulator device and method therefor

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

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257524, 257725, 257345, H01L 2316, H01L 2348

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active

060139366

ABSTRACT:
An integrated circuit chip wherein one or more semiconductor devices are completely isolated from bulk effects of other semiconductor devices in the same circuit and a method of making the integrated circuit chip. The devices may be passive devices such as resistors, or active devices such as diodes, bipolar transistors or field effect transistors (FETs). A multi-layer semiconductor body is formed of, preferably silicon and silicon dioxide. A conducting region or channel is formed in one or more of the layers. For the FET, silicon above and below the channel region provides controllable gates with vertically symmetrical device characteristics. Buried insulator layers may be added to isolate the lower gate of individual devices from each other and to create multiple vertically stacked isolated devices. Both PFET and NFET devices can be made with independent doping profiles in both depletion and accumulation modes.

REFERENCES:
patent: 3622382 (1971-11-01), Brach et al.
patent: 4412868 (1983-11-01), Brown et al.
patent: 4596070 (1986-06-01), Bayraktaroglu
patent: 4601760 (1986-07-01), Hemmah et al.
patent: 4997786 (1991-03-01), Kubota et al.
patent: 5083190 (1992-01-01), Pfiester
patent: 5138437 (1992-08-01), Kumamoto et al.
patent: 5164805 (1992-11-01), Lee
patent: 5273921 (1993-12-01), Neudeck et al.
patent: 5349228 (1994-09-01), Neudeck et al.
patent: 5382818 (1995-01-01), Pein
patent: 5420048 (1995-05-01), Kondo
patent: 5422305 (1995-06-01), Seabaugh et al.
patent: 5442223 (1995-08-01), Fujii
patent: 5461250 (1995-10-01), Burghartz et al.
patent: 5494846 (1996-02-01), Yamazaki
patent: 5536966 (1996-07-01), Robinson et al.
patent: 5548149 (1996-08-01), Joyner
patent: 5689127 (1997-11-01), Chu et al.
R. F. Brom et al., "Vertical Schottky Diode-Memory Device", IBM Technical Bulletin, vol. 15. No. 7, Dec. 1972.

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