High bit rate start code searching and detecting circuit and met

Details High bit rate start code searching and detecting circuit and met High bit rate start code searching and detecting circuit and met

1995-11-22

1998-03-10

Chin, Stephen

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

375368, 370305, H04L 2538

Patent

active

057270368

ABSTRACT:
A high bit rate start code monitoring, searching and detecting circuit includes a Least Significant Bit (LSB) zero counter, a Most Significant Bit (MSB) zero counter, first and second adders, first and second registers, a comparator, a start code detector, and a start code decoder. The LSB zero counter counts the number of consecutive zero bits from the least significant bit while the MSB zero counter counts the number of consecutive zero bits starting with the most significant bit. A LSB zero count output is added with a prescribed value by the first adder to arrive at a Zero.sub.-- Bits.sub.-- Shifted.sub.-- Out (ZBSO) value, which is saved in the first register. A MSB zero count output is added with the stored value of the ZBSO value during the subsequent clock cycle. If the summed (S) value is greater than or equal to 23, then the start code detector is enabled. The start code detector can detect parts of a start code contained in two separate bitstreams or a start code embedded in a bitstream. When enabled by a signal from the start code detector, the start code decoder analyzes the upper 8 bits of the bitstream to output the corresponding start signal to identify a MPEG layer to a central processing unit or a variable length decoder prior to decoding of the encoded bitstream data.

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