Semiconductor chip package

Details Semiconductor chip package Semiconductor chip package

1997-05-02

1999-11-09

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

257778, H01L 2348

Patent

active

059820330

ABSTRACT:
According to a method of manufacturing a semiconductor package of the present invention, a plurality of leads and a large number of minute convex portions are respectively formed by plating on a surface of a metal base and in an outer peripheral area of the leads thereon. An insulative film for holding each of the leads is formed. A solder resist film is formed selectively on a portion including the outer peripheral area having the minute convex portions thereon. A projecting electrode is formed on an outer lead portion of each of the leads through an opening of the solder resist film on an outer lead portion of each of the leads. The metal base is selectively removed except a joint portion thereof on an outer periphery to separate the respective leads. Inner lead portions of the leads and a semiconductor chip are jointed together. The joint portion of the metal base is cut off.

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patent: 5640047 (1997-06-01), Nakashima
patent: 5668405 (1997-09-01), Yamashita
patent: 6663535 (1997-05-01), Chao et al.

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