Gate-turn off thyristor with optimized anode shorting resistance

Details Gate-turn off thyristor with optimized anode shorting resistance Gate-turn off thyristor with optimized anode shorting resistance

1981-05-27

1985-04-16

Clawson, Jr., Joseph E.

357 35, 357 51, 357 86, H01L 2974

Patent

active

045119139

ABSTRACT:
There is provided a gate turn-off thyristor comprising at least one gate turn-off thyristor unit formed in a semiconductor substrate, each unit including therein four semiconductor layers having alternately different conductivity types, a first main electrode kept in ohmic contact with a first outermost semiconductor layer, a control electrode kept in ohmic contact with a first inner semiconductor layer adjacent to said first outermost layer and a second main electrode kept in ohmic contact with a second outermost semiconductor layer and a second inner semiconductor layer adjacent to said second outermost layer, wherein the short-circuiting resistance in said second inner layer resulting from short-circuiting said second outermost layer with said second inner layer by said second main electrode is set within a certain range determined by the carrier life-time the thickness and the resistivity of the second inner layer. Accordingly, a good turn-off performance can be obtained without doping the substrate with life-time killer to increase carrier recombination centers. Further, problems arising from the doping of life-time killer such as the increases in the on-state voltage and the leakage current, the deteriorations at high temperatures of the breakover voltage and the turn-off performance, the decrease in the production yield and the difficulty in increasing the device capacity, can be eliminated.

REFERENCES:
patent: 3303360 (1967-02-01), Gentry
patent: 3324359 (1967-06-01), Gentry

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