Patent
1995-12-11
1999-01-26
Donaghue, Larry D.
395590, 395570, 395569, G06F 938
Patent
active
058647074
ABSTRACT:
A microprocessor is provided which is configured to predict return addresses for return instructions according to a return stack storage included therein. The return stack storage is a stack structure configured to store return addresses associated with previously detected call instructions. Return addresses may be predicted for return instructions early in the instruction processing pipeline of the microprocessor. In one embodiment, the return stack storage additionally stores a call tag and a return tag with each return address. The call tag and return tag respectively identify call and return instructions associated with the return address These tags may be compared to a branch tag conveyed to the return prediction unit upon detection of a branch misprediction. The results of the comparisons may be used to adjust the contents of the return stack storage with respect to the misprediction. The microprocessor may continue to predict return addresses correctly following a mispredicted branch instruction.
REFERENCES:
patent: 4044338 (1977-08-01), Wolf
patent: 4453212 (1984-06-01), Gaither et al.
patent: 4504927 (1985-03-01), Callan
patent: 4807115 (1989-02-01), Torng
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 5136697 (1992-08-01), Johnson
patent: 5179673 (1993-01-01), Stelly, Jr. et al.
patent: 5222220 (1993-06-01), Mehta
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5226130 (1993-07-01), Favor et al.
patent: 5274817 (1993-12-01), Stahl
patent: 5313634 (1994-05-01), Eickomeyer
patent: 5339422 (1994-08-01), Brender et al.
patent: 5355459 (1994-10-01), Matsuo et al.
patent: 5454087 (1995-09-01), Narita et al.
patent: 5526498 (1996-06-01), Matsuo et al.
patent: 5564118 (1996-10-01), Steely, Jr. et al.
patent: 5574871 (1996-11-01), Hoyt et al.
patent: 5584001 (1996-12-01), Hoyt et al.
patent: 5604877 (1997-02-01), Hoyt et al.
patent: 5606682 (1997-02-01), McGarity
patent: 5623614 (1997-04-01), Van Dyke et al.
patent: 5649225 (1997-07-01), White et al.
patent: 5655098 (1997-08-01), Witt et al.
Foreign Search Report dated Feb. 26, 1997 for PCT/US96/11842.
Tomasula, R. M., "An Efficient Algorithm for Exploiting Multiple Arithmetic Units," IBM Journal, Jan. 1967, pp. 25-33.
DIALOG, Microprocessor Report, Oct. 24, 1994, pp. 1--7.
IBM Technical Disclosure Bulletin, "Subroutine CALL/RETURN Stack," Apr. 30, 1988, vol. 30, No. 11, pp. 221-225.
IBM Technical Disclosure Bulletin, "Highly Accurate Subroutine Stack Prediction Mechanism," Mar. 10, 1986, vol. 28, No. 10, pp. 4635-4637.
DIALOG, Microprocessor Report, Oct. 24, 1994, pp. 107.
Intel, "Chapter 2: Microprocessor Architecture Overview," pp. 2-1 through 2-4.
Michael Slater, "AMD's K5 Designed to Outrun Pentium," Microprocessor Report, vol. 8, No. 14, Oct. 24, 1994, 7 pages.
Sebastian Rupley and John Clayman, "P6: The Next Step?," PC Magazine, Sep. 12, 1995, 16 pages.
Tom R. Halfhill, "AMD K6 Takes on Intel P6," Byte, Jan. 1996, 4 pages.
Yeh et al. "Branch History Table Indexing to Prevent Pipeline Bubbles in Wide-Issue Superscalar Processors," 1993.
Mahalingaiah Rupaka
Tran Thang M.
Advanced Micro Devices , Inc.
Donaghue Larry D.
Kivlin B. Noel
Merkel Lawrence J.
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