Microprocessor configured to selectively invoke a microcode DSP

Details Microprocessor configured to selectively invoke a microcode DSP Microprocessor configured to selectively invoke a microcode DSP

1995-12-05

1999-01-26

Lall, Parshotam S.

395387, 395589, 395590, G06F 932

Patent

active

058646892

ABSTRACT:
A microprocessor having a microcode unit is provided. Routines comprising DSP functions and instruction emulation routines are stored within a read-only memory within the microcode unit. The routines may be fetched by the microprocessor upon occurrence of a corresponding instruction. For example, DSP functions may be fetched upon occurrence of an instruction defined by the microprocessor to be indicative of a DSP function. The microcode unit provides a library of useful functions. Effectively, the instruction set executed by the microprocessor is increased. A number of methods for defining instructions indicative of a DSP function are contemplated. For example, a subroutine call instruction having a target address within a predefined range of addresses may be defined as indicative of a DSP function. Alternatively, a special subroutine call instruction may be added to the instruction set. Detection of the special subroutine call instruction encoding causes the microprocessor to fetch instructions from the microcode unit. A third alternative is to detect data patterns in data movement instructions and cause instructions to be fetched from the microcode unit upon occurrence of particular data patterns.

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Computer Architecture: A Quantitative Approach, John L. Hennessy, David A. Patterson, Morgan Kaufmann Publishers Inc., San Mateo, CA (1990), pp. 208-214.

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