Method of manufacturing semiconductor integrated circuit BI-MOS

Metal working – Method of mechanical manufacture – Assembling or joining

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29576W, 29577C, 29578, 29591, 148174, 148187, 148188, 156653, 156657, 156662, 357 43, 357 49, 357 50, H01L 2176, H01L 21441

Patent

active

044869428

ABSTRACT:
A method of manufacturing a semiconductor integrated circuit of the BI-MOS type on a common semiconductor substrate comprising forming an oxide film by thermal oxidation to isolate the elements and a base layer of one conductivity type by a surrounding dielectric followed by removing the oxide film from emitter and collector electrode extending regions. A silicon film of a second conductivity type is formed by patterning and used to form an emitter layer and a collector extending layer by differing impurities from the silicon film. Patterning is then employed to form gate, emitter and collector electrodes. Finally, the mask for the silicon film is used to form a base electrode extending layer, a source layer and a drain layer of the first conductivity type and of high impurity density.

REFERENCES:
patent: 3767487 (1973-10-01), Steinmaier
patent: 3999213 (1976-12-01), Brandt et al.
patent: 4041518 (1977-08-01), Shimizu et al.
patent: 4151631 (1979-05-01), Klein
patent: 4299024 (1981-10-01), Piotrowski

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