Dual LDD submicron CMOS process for making low and high voltage

Details Dual LDD submicron CMOS process for making low and high voltage Dual LDD submicron CMOS process for making low and high voltage

1988-10-18

1991-06-18

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437 44, 437 57, 357 233, 357 42, H01L 21265, H01L 21336

Patent

active

050249606

ABSTRACT:
The disclosure relates to a CMOS flow process for formation of high and low voltage transistors simultaneously in a single semiconductor chip. The low and high voltage transistors share the same gate oxide thickness and the same polysilicon gate level. This is accomplished without any additional masking steps and through the use of a separate lightly doped drain for the high voltage N-channel devices. The sources of the high voltage N-channel devices are fabricated using the more heavily concentrated LDD implant normally used for the low voltage transistors. This minimizes the source resistance of the high voltage transistor which results in higher performance through improved saturated transconductance. From a high voltage capability point of view, the flow permits the realization of a single level polysilicon single gate oxide thickness low/high voltage CMOS process.

REFERENCES:
patent: 4062699 (1977-12-01), Armstrong
patent: 4089712 (1978-05-01), Joy et al.
patent: 4172260 (1979-10-01), Okabe
patent: 4318216 (1982-03-01), Hsu
patent: 4578128 (1986-03-01), Mundt
patent: 4642878 (1987-02-01), Maeda
patent: 4697332 (1987-10-01), Joy et al.
patent: 4722909 (1988-02-01), Parrillo et al.
patent: 4760033 (1988-07-01), Mueller
patent: 4808548 (1989-02-01), Thomas et al.
patent: 4908327 (1990-03-01), Chapman
Tsang et al., "Fabrication of High Performance LDDFETs with Oxide Sidewall-Spacer Technology", IEEE Trans. on Electron Devices, vol. ED-29, No. 4, Apr. 1982, pp. 590-596.

Affiliated with

Also associated with

Rating

Dual LDD submicron CMOS process for making low and high voltage does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual LDD submicron CMOS process for making low and high voltage , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual LDD submicron CMOS process for making low and high voltage will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-145578