Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-03-26
1999-11-09
Kunemund, Robert
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438692, 438706, 438974, H01L 21306
Patent
active
059813920
ABSTRACT:
A method of manufacturing a semiconductor monocrystalline mirror-surface wafer includes at least a gas phase etching process and a mirror-surface polishing process. The mirror-surface polishing process is composed of coarse polishing and finishing polishing, and only the coarse polishing is performed prior to the gas phase etching process, while the finishing polishing is carried out after the gas phase etching process. In addition, a heat treatment process is performed after the gas phase etching process but before the final cleaning process. The heat treatment process also serves as a donor-annihilation heat treatment process. The method can manufacture semiconductor monocrystalline mirror-surface wafers having a high degree of flatness, while resolving the problems involved in the conventional method; i.e., haze produced on a wafer surface, the introduction of strain and defects in the surface, high cost, and low productivity.
REFERENCES:
patent: 5516706 (1996-05-01), Kusakabe
patent: 5744401 (1998-04-01), Shirai et al.
Takao Abe, et al., "Microroughness Measurements on Polished Silicon Wafers", 362 Japanese Journal of Applied Physics, Part 1, 31 (1992) Mar., No. 3, Tokyo, JP.
Toshiro Nakanishi, et al., "Influence of Silicon Surface Roughness on Time-Dependent Dielectric Breakdown", 2311 Fujitsu Scientific & Technical Journal 29 (1993) Summer, No. 2, Kawasaki, JP.
Champagne Donald L.
Kunemund Robert
Shin-Etsu Handotai & Co., Ltd.
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