Integrated circuit having reduced clock cross-talk

Details Integrated circuit having reduced clock cross-talk Integrated circuit having reduced clock cross-talk

1986-06-18

1987-11-17

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Charge transfer device

Compensating for or preventing signal charge deterioration

377 60, 307550, H03K 2346, G11C 702

Patent

active

047078448

ABSTRACT:
Charge-coupled devices are very sensitive to clock cross-talk due to the overlap between successive electrodes. The influence of this cross-talk is reduced when the clock lines are periodically connected to ground by a low-ohmic impedance. For this purpose, each clock line is controlled from a buffer, whose output is connected to a clock line. A clamping transistor is connected between the output and ground. When this clamping transistor is controlled by means of the output signal and at the same time by the input signal of the buffer, the output is clamped to ground at the instant at which the cross-talk is expected by means of only a single clamping transistor.

REFERENCES:
patent: 3927334 (1975-12-01), Callahan
patent: 3950654 (1976-04-01), Broedner et al.
patent: 3967136 (1976-06-01), Krambeck
patent: 3983413 (1976-09-01), Gunsager et al.
patent: 4230951 (1980-10-01), Suzuki et al.
patent: 4509181 (1985-04-01), Sauer

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