Method for manufacturing semiconductor integrated circuit device

Details Method for manufacturing semiconductor integrated circuit device Method for manufacturing semiconductor integrated circuit device

1988-12-02

1990-01-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437228, 437233, 148DIG11, 357 59, H01L 21265

Patent

active

048928372

ABSTRACT:
Disclosed is a method of producing a bipolar transistor which enables an external base region, an intrinsic base region and an emitter region to be formed in self-alignment with respect to the base electrode. More specifically, the method comprises the steps of side-etching an insulating film formed underneath the base electrode by a wet etching process to provide an undercut portion, depositing polycrystalline silicon so as to extend into the undercut portion by low pressure CVD to thereby fill the undercut portion with the polycrystalline silicon, and subjecting the polycrystalline silicon to thermal oxidation, thereby simultaneously forming a sidewall spacer whereby the base electrode and the emitter electrode are electrically isolated from each other and an oxide film on the emitter forming region, the oxide film having high selectivity in anisotropic etching with respect to the substrate (silicon).

REFERENCES:
IBM TDB, vol. 28, No. 5, 10/85, pp. 2196-2198.
IBM TDB, vol. 29, No. 5, 10/86, pp. 2262-2264.

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