Method of making a planar structure containing MOS and bipolar t

Fishing – trapping – and vermin destroying

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437 31, 437 34, 437 41, 437162, 437193, 437194, 437200, 156644, 357 43, 357 59, H01L 21225, H01L 2176

Patent

active

047074566

ABSTRACT:
A highly planarized integrated circuit structure having at least one bipolar device and at least one MOS device is described as well as a method of making the structure. The structure comprises a substrate having a field oxide grown thereon with portions defined therein respectively for formation of a collector region and a base/emitter region for a bipolar device and a source/gate/drain region for an MOS device. All of the contacts of the devices are formed using polysilicon which fills the defined portions in the field oxide resulting in the highly planarized structure.

REFERENCES:
patent: 4319954 (1982-03-01), White et al.
patent: 4343082 (1982-08-01), Lepselter et al.
patent: 4445268 (1984-05-01), Hirao
patent: 4542580 (1985-09-01), Delivorias

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