Logic analyzer for high channel count applications

Details Logic analyzer for high channel count applications Logic analyzer for high channel count applications

1994-11-10

1996-04-09

Beausoliel, Jr., Robert W.

Excavating

324 731, H04B 1700

Patent

active

055068502

ABSTRACT:
The invention provides a multi-stage architecture where the first stage is extremely wide and fast, but has a shallow depth which greatly reduces cost. A second stage provides a more conventional variable width/depth memory. Between the two stages is a programmable cross point switch matrix which determines which channels, of the many channels from the first stage, is to be connected as inputs to the second stage. Trigger comparisons may be performed in either or both stages.

REFERENCES:
patent: 3922537 (1975-11-01), Jackson
patent: 3976940 (1976-08-01), Chau
patent: 4425643 (1984-01-01), Chapman
patent: 4434488 (1984-02-01), Palmquist
patent: 4475237 (1984-10-01), Glasby
patent: 4517512 (1985-05-01), Petrich
patent: 4573152 (1986-02-01), Greene
patent: 4654848 (1987-03-01), Noguchi
patent: 4788492 (1988-11-01), Schubert
patent: 4989209 (1991-01-01), Littleburg
patent: 5067130 (1991-11-01), Jackson

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