Semiconductor memory device having improved write-verify operati

Details Semiconductor memory device having improved write-verify operati Semiconductor memory device having improved write-verify operati

1985-12-19

1988-04-12

Hecker, Stuart N.

Static information storage and retrieval

Addressing

365185, 365175, 307449, G11C 700

Patent

active

047379367

ABSTRACT:
In a semiconductor memory device comprising row decoders, word line drivers, word lines, memory cells, a d.c. power source for a write mode, and a d.c. power source for a read mode, one of the word line drivers comprises a first circuit for supplying a write voltage from the d.c. power source for the write mode to one of the word lines selected by the row decoders when predetermined data is written into one of the memory cells connected to the selected word line and a second circuit for supplying a current from the selected word line to the d.c. power source for the read mode when the predetermined data is to be verified after the predetermined data has been written into one of the memory cells; the second circuit comprises a depletion type transistor and a one-directional conductive element connected in parallel to the depletion type transistor.

REFERENCES:
patent: 4301535 (1981-11-01), McKenny et al.
patent: 4368524 (1983-01-01), Nakamura et al.
patent: 4374430 (1983-02-01), Higuchi
patent: 4601017 (1986-07-01), Mochizuki et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device having improved write-verify operati does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having improved write-verify operati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having improved write-verify operati will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1434018