Method and apparatus for minimizing a memory table for use with

Details Method and apparatus for minimizing a memory table for use with Method and apparatus for minimizing a memory table for use with

1985-12-06

1988-04-12

Harkcom, Gary V.

Boots, shoes, and leggings

364715, G06F 7556, G06F 750

Patent

active

047379251

ABSTRACT:
A method which reduces the memory required to store correction factors used in logarithmic addition and subtraction of logarithmic operands. The method is implemented by a circuit which adds a predetermined correction factor to the minimum value of two logarithmic input operands. Correction factors are quantized to single polarity values. Predetermined ranges of magnitude values of the correction factors are selected in which the minimum value of each range is represented by a bias level. As a result of the bias levels, stored representations for the addition and subtraction factors are made much smaller resulting in less memory which is required. An addition of a predetermined bias level to the minimum value is effected simultaneous to addressing a predetermined adjustment factor in the reduced memory. A second addition is required to provide an output which represents either an addition or subtraction of the signed operands.

REFERENCES:
patent: 4531124 (1985-07-01), Lassallette et al.
patent: 4682302 (1987-07-01), Williams
Frey et al., "A Table Reduction Technique for Logarithmically Architected Digital Filters", IEEE Trans. Acoust., Speech, and Signal Proc., vol. ASSP-33, No. 3, Jun. 1985, pp. 718-719.
Kurokawa et al., "Error Analysis of Recursive Digital Filters Implemented with Logarithmic Number System", IEEE Trans. Acoust., Speech and Signal Proc., vol. ASSP-28, No. 6, Dec. 1980, pp. 706-714.
Taylor, "An Extented Precision Logarithmic Number System", IEEE Trans. on Acoustics, Speech and Signal Processing, vol. ASSP-31, No. 1, Feb. 1983, pp. 232-234.
Kingsbury et al., "Digital Filtering Using Logarithmic Arithmetic", Electronics Letters, vol. 7, No. 2, Jan. 28, 1971, pp. 56-58.
Lang et al., "Integrated-Circuit Logarithmic Arithmetic Units", IEEE Trans. on Comp., vol. C-34, No. 5, May 1985, pp. 475-483.
Brubaker et al., "Multiplication Using Logarithms Implemented with Read-Only Memory", IEEE Trans. on Comp., vol. C-24, No. 8, 8/1975, pp. 761-765.

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