Reducing noise in introducing bias charge into charge transfer d

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364862, 307597, 307603, 333165, G06G 716, H03K 5159

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045410682

ABSTRACT:
A bias charge (commonly known as a "fat zero") is divided into a plurality, n, of equal parts. These equal parts are differentially delayed, and the results appearing parallel in time are summed to generate a bias charge with reduced noise. The reduced-noise bias charge is then applied to an input of a charge transfer device -- e.g., one of the charge coupled device (CCD) analog shift registers used in a CCD imager to transport charge packets descriptive of picture elements in an imager.

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"A High Speed Digitally Programmable CCD Transversal Filter" A. M. Chiang & B. E. Burke, 1980 Government Microcircuit Applications Conference Digest of Papers, pp. 182 & 183.
"Parallel-In/Serial-Out; A New Approach for C.C.D. Transversal Filters"; K. Knauer, L. Mader, H. J. Pfleiderer, and M. Schlichte; Electronics Letters, Mar. 3, 1977, vol. 13, No. 5, pp. 126 & 127.

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