Boots – shoes – and leggings
Patent
1986-12-19
1987-07-14
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 1300, G06F 936
Patent
active
046807004
ABSTRACT:
A virtual memory address translation mechanism is provided for converting virtual memory addresses provided by a CPU into real memory addresses within page frames in a large hierachial memory wherein the real memory space is substantially smaller than the scope of the virtual memory. The conversion or translation mechanism includes a combined table in the memory which includes a first list covering the respective virtual address of each memory address (Inverted Page Table or IPT) and a second list connecting each of a plurality of hashed addresses with a predetermined initial virtual address of a linked group of virtual addresses, each of which when hashed produces the connected hashed address (Hashed Addressed Table, HAT). The system also has means for hashing a selected virtual address to produce a hashed address. Also included is apparatus for sequentially searching through the linked group of virtual addresses in the combined table until a selected virtual address is located as well as apparatus responsive to the location of a particular selected virtual address for accessing from the first list, the real memory address of the located virtual address.
REFERENCES:
patent: 3761881 (1973-09-01), Anderson et al.
patent: 3781808 (1973-12-01), Ahearn et al.
patent: 4215402 (1980-07-01), Mitchell et al.
patent: 4285040 (1981-08-01), Carlson et al.
patent: 4356549 (1982-10-01), Chueh
patent: 4464713 (1984-08-01), Benhase et al.
IBM Technical Disclosure Bulletin, vol. 24, No. 6, 11/81, "Virtual to Real Address Translation Using Hashing", by J. Cocke et al.
8th Annual Symposium on Computer Architecture entitled, "IBM System/38 Support for Capability-Based Addressing", by Merle E. Houdek et al., 5/81.
44
Hester Phillip D.
Simpson Richard O.
International Business Machines - Corporation
Kraft J. B.
Lacasse Randy W.
Shaw Gareth D.
Tyson Thomas E.
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