Method for accessing control and status registers across a peer-

Details Method for accessing control and status registers across a peer- Method for accessing control and status registers across a peer-

1996-10-21

1998-12-29

Ray, Gopal C.

395308, 395872, G06F 1300, G06F 1338

Patent

active

058549102

ABSTRACT:
A method for performing a data transfer to one of a plurality of peripheral devices in a computer system comprising a first bus, a bus bridge for coupling to the first bus and for interfacing to a second bus, the second bus coupled to the bus bridge, and a plurality of peripheral devices connected to the second bus. The method comprises activating a register access source port in the bus bridge to configure the register access source port in the bus bridge for a transfer and the bus bridge receiving and storing a target address of a register in a peripheral. The bus bridge then transmits one or more command messages to the target peripheral device including the address of the target register in the target peripheral device. Next, the bus bridge receives and stores data from the first bus in a buffer. The bus bridge then transmits the data as one or more address/data pairs to a destination port of the target peripheral device. The one or more address/data pairs each includes an address of the destination port in the target peripheral device and the data received from the first bus.

REFERENCES:
patent: 5535341 (1996-07-01), Shah et al.
patent: 5649161 (1997-07-01), Andrade et al.
patent: 5659718 (1997-08-01), Osman et al.
patent: 5664117 (1997-09-01), Shah et al.
patent: 5694556 (1997-12-01), Neal et al.
PCI Local Bus Multimedia Design Guide, Revision 1.0, Mar. 29, 1994, pp. 1-40.
Peripheral Components, Interl, 1995, pp. ix, 1-1 through 1-72.

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