Boots – shoes – and leggings
Patent
1987-02-17
1990-12-18
Chan, Eddie P.
Boots, shoes, and leggings
3642444, 3642405, 3642388, 364260, G06F 1300, G06F 1337, G06F 1338
Patent
active
049790960
ABSTRACT:
A multiprocessor system includes processor units connected physically in one-dimensional fashion along a ring bus located at the node of each processor element and associated local memory, so that various system operating modes are possible. The ring bus is used for inter-processor data transfer, with the address and read/write signals to each local memory being supplied from the processor element (by the program). Sychronization between the data flow on the ring bus and the processor operation is made automatic by the innovated method of inter-processor connection, which includes flag latches in the ring bus, whereby the system accomplishes extremely high-speed processing.
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patent: 4149242 (1979-04-01), Pirz
patent: 4257100 (1981-03-01), Syrbe et al.
patent: 4491915 (1985-01-01), Forquer et al.
patent: 4524455 (1985-06-01), Holsztynski et al.
patent: 4550437 (1985-10-01), Kobayashi et al.
patent: 4663706 (1987-05-01), Allen et al.
Kato Kanji
Matsushima Hitoshi
Ueda Hirotada
Chan Eddie P.
Hitachi , Ltd.
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