Fishing – trapping – and vermin destroying
Patent
1986-06-18
1988-04-12
Roy, Upendra
Fishing, trapping, and vermin destroying
437 29, 437 45, 437953, 148DIG82, H01L 2182
Patent
active
047374713
ABSTRACT:
A method of fabricating a narrow channel width IG-FET which includes compensating for impurities diffused into the channel region from the channel stopper, thereby providing the IG-FET with a threshold providing the IG-FET with a threshold voltage establishing at a level substantially the same as that of conventional wider channel width IG-FETs. According to the present invention, impurities having a conductivity type opposite to that of the impurities diffused from the channel stopper are selectively implanted in at least the channel region of the narrow channel width IG-FET, to compensate the diffused impurities. Impurities for channel doping are then implanted to adjust the threshold voltage.
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IEEE Transactions on Electron Devices, vol. ED-20, No. 12, Dec. 1973, pp. 1129-1132, New York, U.S.; R. A. Moline et al.: "Self-Aligned Maskless Chan Stops for IGFET Integrated Circuits".
Ema Taiji
Shirato Takehide
Fujitsu Limited
Roy Upendra
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