VLSI self-aligned bipolar transistor

Details VLSI self-aligned bipolar transistor VLSI self-aligned bipolar transistor

1989-08-09

1990-12-18

James, Andrew J.

357 59, H01L 2972

Patent

active

049790102

ABSTRACT:
A self-aligned bipolar transistor in which an emitter polysilicon layer is used to align both an extrinsic base region and a deep collector contact. The diffused extrinsic base is separated from the diffused emitter region by an oxide sidewall segment. Doping of the extrinsic base and the emitter is achieved by diffusion from doped overlying polysilicon loayers. The resultant structure is size limited primarily by the metal pitch of the leads.

REFERENCES:
patent: 3379584 (1968-04-01), Bean et al.
patent: 4157269 (1979-06-01), Ning et al.
patent: 4381953 (1983-05-01), Ho et al.
patent: 4495512 (1985-01-01), Isaac et al.
patent: 4583106 (1986-04-01), Anantha et al.
patent: 4686763 (1987-08-01), Thomas et al.
S. P. Gaur, et al., "Optimum Lateral PNP Transistor", vol. 26, No. 9, Feb. 1984, pp. 4584-4585.

Affiliated with

Also associated with

Rating

VLSI self-aligned bipolar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with VLSI self-aligned bipolar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and VLSI self-aligned bipolar transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1428970