Process for forming an epitaxial layer having portions of differ

Details Process for forming an epitaxial layer having portions of differ Process for forming an epitaxial layer having portions of differ

1988-08-17

1989-11-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 89, 437 84, 437970, 148DIG150, H01L 2100, H01L 2102, H01L 2172, H01L 2176

Patent

active

048822949

ABSTRACT:
An integrated circuit device uses a silicon chip having an epitaxial layer which has two portions of different thicknesses in which are formed separate junction transistors of different characteristics. In the growth of the epitaxial layer there is first formed on the front surface of the chip a localized sacrificial silicon dioxide layer removable in situ by baking in a reducing atmosphere. Then an epitaxial layer is grown by a first epitaxial deposition phase selectively over only the silicon dioxide free regions of the front surface of the chip. The sacrificial silicon dioxide layer is then removed in situ by baking in hydrogen. There is then resumed blanket growth of the epitaxial layer by a second epitaxial deposition phase. In the resulting chip, a large geometry junction transistor of relatively low switching speed and moderately high breakdown voltage (compared to 12 volts) is formed in the thicker epitaxial portion and a small geometry junction transistor of high switching speed and lower breakdown voltage is formed in the thinner epitaxial portion.

REFERENCES:
patent: 4270960 (1981-06-01), Bollen et al.
patent: 4323417 (1982-04-01), Lam
patent: 4346513 (1982-08-01), Nishizawa et al.
patent: 4592792 (1986-06-01), Corboy, Jr. et al.
patent: 4659392 (1987-04-01), Vasudev
patent: 4755487 (1988-07-01), Scovell et al.

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