Semiconductor device and method for manufacturing the same

Details Semiconductor device and method for manufacturing the same Semiconductor device and method for manufacturing the same

1982-06-18

1985-09-10

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29577C, 29578, 29580, 148 15, 148174, 148175, 148188, H01L 21225, H01L 21302

Patent

active

045397422

ABSTRACT:
A semiconductor device wherein collector connecting wiring made of for example n.sup.+ -type polycrystalline silicon layer is formed by an anisotropic etching which simultaneously engrave a groove in a semiconductor substrate. A collector layer is formed on a non-etched projection, while base contact hole is formed in the lower portion of the groove. Therefore, the base contact hole is not contacted with collector layer, thus preventing the flow of a leakage current and short-circuiting therebetween.

REFERENCES:
patent: 4220961 (1980-09-01), Werner
patent: 4288805 (1981-09-01), Depey
patent: 4338622 (1982-07-01), Feth et al.
patent: 4377903 (1983-03-01), Kanzaki et al.
patent: 4407059 (1983-10-01), Sasaki
patent: 4433470 (1984-02-01), Kameyama et al.
Tang et al., IEDM Dig. Tech. Papers, "Sub-Nanosecond Self-Aligned I.sup.2 L/MTL Circuits" 1979, (pp. 201-204).

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