Device for deriving a sampling rate

Dynamic information storage or retrieval – Control of storage or retrieval operation by a control... – Mechanism control by the control signal

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Details

358337, 360 64, 360 51, 331 17, G11B 509, H04N 595

Patent

active

050439669

ABSTRACT:
The device includes a synchronizing-signal separator (20), a phase-locked loop (23), having a phase comparator (25), a voltage-controlled oscillator (28) and a frequency divider (31). The device further includes a gate circuit (26) having an input (S) coupled to the output of the synchronizing-signal separator (20), and an input (5) for receiving a head-change signal (a). The output (36) of the gate circuit (26) is coupled to a control-signal input (37) of the frequency divider (31). The gate circuit (26) is adapted to generate the control signal at a first instant (t.sub.1) of a head change and to sustain this control signal until a second instant (t.sub.2) of detection of the n-th (preferably the first) synchronizing signal after the head change. The frequency divider (31), which includes a counter (40), is adapted to inhibit the output signal (d) in response to the control signal, to set the count to a specific value, and to enable the counter at the second instant in order to realize frequency-division.

REFERENCES:
patent: 3702382 (1972-11-01), Breikss
patent: 3718755 (1973-02-01), Crosno
patent: 3887941 (1975-06-01), Dann et al.
patent: 4167027 (1979-09-01), Hashimoto
patent: 4175267 (1979-11-01), Tachi
patent: 4203076 (1980-05-01), Yamashita
patent: 4692814 (1987-09-01), Nishimoto
patent: 4729025 (1988-03-01), Yanase
patent: 4772950 (1988-09-01), Furuhata et al.
patent: 4812906 (1989-03-01), Wolber

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