Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1990-05-30

1991-08-27

Popek, Joseph A.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, 365233, G11C 700

Patent

active

050439472

ABSTRACT:
A memory device is provided including a plurality of memory arrays and peripheral circuits. For example, in a dynamic RAM the peripheral circuitry will include row address decoders, column address decoders, sense amplifiers and main amplifiers disposed in such a manner as to correspond to the memory arrays, respectively. The desired row address decoders, column address decoders, sense amplifiers and main amplifiers are selectively operated in accordance with a common array selection signal generated on the basis of at least part of row address signals. Accordingly, only the row address decoders, column address decoders, sense amplifiers and main amplifiers corresponding to the memory array containing the designated memory cells are operated selectively in accordance with the common array selection signal. It is thus possible to reduce power consumption of the dynamic RAM and to simplify the structure of the peripheral circuits and wirings.

REFERENCES:
patent: 4569036 (1986-02-01), Fujii et al.
patent: 4658377 (1987-04-01), McElroy
patent: 4758993 (1988-07-01), Takemae
patent: 4941129 (1990-07-01), Oshima et al.

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