Boots – shoes – and leggings
Patent
1994-07-28
1996-03-05
Kim, Ken S.
Boots, shoes, and leggings
395375, 364DIG1, 364230, G06F 930
Patent
active
054974968
ABSTRACT:
A plurality of instructions are read out from an instruction cache 1 for each cycle and temporarily stored in a second shift register SR2. The instructions stored in second shift register SR2 are transferred to empty positions of instruction registers IR0 to IR3 and fetched. An instruction decoder 3 selects instructions which can be processed in a parallel manner from the instructions stored in instruction registers IR0 to IR3 and supplies the same to any of processing units 4 to 7. A selector control circuit 12 controls the selection state of each selector 100 to 103, 200 to 203 based on a NUM signal indicating the number of empty instruction registers. The instructions stored in second shift register SR2 are thereby transferred to emptied instruction registers only. In this way, a new instruction is supplied to an empty instruction register as a supplement for each cycle.
REFERENCES:
patent: 4942525 (1990-07-01), Shintani et al.
patent: 5121502 (1992-06-01), Rau et al.
patent: 5133077 (1992-07-01), Karne et al.
patent: 5185868 (1993-02-01), Tran
patent: 5202967 (1993-04-01), Matsuzaki et al.
patent: 5267350 (1993-11-01), Matsubara et al.
Grohoski, "Machine organization of the IBM RISC System/6000 Processor", IBM Journal of Research and Development, vol. 34, No. 1, Jan. 1990, pp. 37-58.
Kim Ken S.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Superscalar processor controlling fetching of instructions based does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Superscalar processor controlling fetching of instructions based, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Superscalar processor controlling fetching of instructions based will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1418578