High byte right-shift apparatus with a register alias table

Details High byte right-shift apparatus with a register alias table High byte right-shift apparatus with a register alias table

1993-12-29

1996-03-05

Geckil, Mehmet

Boots, shoes, and leggings

364258, 364259, 3642595, 364DIG1, G06F 900

Patent

active

054974933

ABSTRACT:
A high byte right-shift detection mechanism with a register alias table unit (RAT) for selectively causing right-shifting of high byte physical source register data before operations are executed within a microprocessor is described. A high byte right-shift condition occurs when a logical source register that is presented to the RAT for renaming is a high byte register and the corresponding physical source register selected by the RAT is not right-adjusted. A non right-adjusted physical source register is detected when either the physical source register is an architectural state register or the physical source register is a larger width register that includes the renamed high byte register. The high byte right-shift detection mechanism detects a high byte shirt-right condition when a logical source register is renamed and generates shift bits and zero extend bits to control the right-shifting and zero extending of the data in the correspondingly renamed physical source register before execution by an execution unit that assumes right-adjusted input data. Right-adjusted result data from the execution unit is stored in a physical destination register (a speculative state register) in the re-order buffer (ROB) until retirement. If the RAT renames another high byte logical source register to source that physical destination register before the register retires, right-shifting of the physical destination register data is not required because the data is already right-adjusted. At retirement, physical destination register data corresponding to a high byte logical destination register is left-shifted and stored in the high byte register of a non-speculative state register in the retirement register file (RRF).

REFERENCES:
patent: 4245327 (1981-01-01), Moriya et al.
patent: 4300195 (1981-11-01), Raghunathan et al.
patent: 4348721 (1982-09-01), Brereton et al.
patent: 4833640 (1989-05-01), Baba
patent: 4992938 (1991-02-01), Cocke et al.
patent: 5134561 (1992-07-01), Liptay
patent: 5163139 (1992-11-01), Haigh et al.
Author, Mike Johnson, entitled Superscalar Microprocessor Design, Advance Micro Devices, Prentice Hall Series in Innovative Technology, 1991, pp. 1-289.
Val Popescu, et al. entitled, "The Metaflow Architecture," IEEE Micro, Jun. 1991, pp. 10-13, 63-73.

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