Patent
1989-08-21
1991-08-27
James, Andrew J.
357 43, 357 48, 357 89, H01L 2702
Patent
active
050437887
ABSTRACT:
A single chip microcomputer as a semiconductor device comprises CMOS logic portion and a driver portion operating at a high voltage which can be connected to an external device. In the region of the CMOS logic portion, a P type well layer and an N type well layer are formed on a P type silicon substrate. An N type well layer is formed in the region constituting the driver portion. The junction depth of the N type well layer constituting the driver portion is made deeper than that of the N type well layer constituting the CMOS logic portion. A MOS transistor is formed in the region of each well layer in the CMOS logic portion. A MOS transistor whose drain breakdown voltage is increased is formed in the region of the N type well layer of the driver portion. The junction depth of the N type well layer is made deeper than that of the N type well layer constituting the CMOS logic portion at least below the drain region of this MOS transistor. The MOS transistor constituting the CMOS logic portion operates at a lower voltage while the MOS transistor constituting the driver portion operates at a higher voltage in order to drive external devices such as a fluorescent display tube connected thereto.
REFERENCES:
patent: 4258379 (1981-03-01), Watanabe et al.
patent: 4379726 (1983-04-01), Kumamaru et al.
patent: 4894692 (1990-01-01), Noda et al.
Miyata Kazuaki
Omoto Kayoko
Bowers Courtney A.
James Andrew J.
Mitsubishi Denki & Kabushiki Kaisha
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