Subtractor-amplifier circuit for cascaded analog-digital convert

Details Subtractor-amplifier circuit for cascaded analog-digital convert Subtractor-amplifier circuit for cascaded analog-digital convert

1989-12-27

1991-08-27

Scott, J. R.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341161, H03M 112

Patent

active

050437330

ABSTRACT:
In a cascaded analog-digital converter, a first ADC determines the most significant bits. To determine the least significant bits, in a second ADC, it is necessary to assess the difference between the input analog signal V.sub.E and its already digitized part, reconverted into analog form. The subtractor/amplifier receives, firstly, the input signal V.sub.E which is converted into a current i.sub.E and, secondly, the most significant bits on a digital-analog converter. This constitutes a source, capable of being modulated, which gives a current i.sub.c. Two parallel-mounted transistors differentiate between the current i.sub.c of the source capable of being modulated and the current i.sub.E corresponding to the input signal V.sub.E, and amplify it. The disclosure is applicable to cascaded ADCs.

REFERENCES:
patent: 4535319 (1985-08-01), Penney
patent: 4639715 (1987-01-01), Doluca
patent: 4763107 (1988-08-01), Koen et al.
patent: 4849759 (1989-07-01), Hughes
patent: 4875048 (1989-10-01), Shimizu et al.

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