Single chip cache with partial-write circuit for transferring a

Details Single chip cache with partial-write circuit for transferring a Single chip cache with partial-write circuit for transferring a

1989-10-25

1992-09-08

Lee, Thomas C.

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364DIG1, 3642386, 3642398, 3642478, 3642603, 3642823, 3642841, G06F 1314, G06F 1202

Patent

active

051465736

ABSTRACT:
In a cache memory setup, a buffer register is provided to accommodate the data read from a data memory. Between the buffer register and the data memory is connected a selector. This selector selectively transfers to the buffer register part of the data read from the data memory. The remaining part of the data is replaced with appropriate data for transfer to the buffer register. This arrangement provides the cache memory with a partial-write function.

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Nikkei Electronics, published by Nikkei-McGraw-Hill, Inc., Nov. 16, 1987, pp. 170-171, English translation provided.

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