Split-gate process for non-volatile memory

Details Split-gate process for non-volatile memory Split-gate process for non-volatile memory

1993-08-02

1996-03-05

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 43, 437191, H01L 218247

Patent

active

054967473

ABSTRACT:
A split-gate memory cell and its fabrication are described. The semiconductor substrate is of a first conductivity type. The process begins by forming a conductive gate overlying the substrate, but electrically insulated therefrom by a layer of a first dielectric material. The gate comprises a first layer of conductive material, a second layer of dielectric material, and a third layer also composed of a second conductive layer. First and second sidewall dielectric spacers are formed adjacent to the first edge and the second opposing edge, respectively of the gate. Ions are implanted into the substrate. Those ions comprise a species of an opposite conductivity type. The ions are implanted at a substantial acute angle relative to a vertical angle with respect to the substrate. A third conductive material is deposited upon the second conductive layer and the first and second sidewall dielectric spacers. The third conductive material is in electrical contact with the second conductive layer.

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